XPC8241LZP200B

BGA, Low-voltage TTL logic interface, ROM controller interface, VDD 0.3 to 2.1V, LVDD 0.3 to 5.4 V

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Price:: US $22.50~23.00 / piece [Get Latest Price]

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	US $22.50~23.00

PartNumber:: XPC8241LZP200B

Brand:: Freescale Semiconductor, Inc - Freescale | Pack: BGA | D/C: 04+

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Products Upload time: 2011-07-20

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Part Number:XPC8241LZP200B
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Product Summary

The XPC8241LZP200B is a Freescale Semiconductor. The XPC8241LZP200B combines a PowerPC. MPC603E core with a PCI bridge so that system designers can rapidly design systems using peripherals designed for PCI and other standard interfaces. Also, a high-performance memory controller supports various types of ROM and SDRAM. The XPC8241LZP200B is the second of a family of products that provide system-level support for industry-standard interfaces with an MPC603e processor core. This hardware specification describes pertinent electrical and physical characteristics of the XPC8241LZP200B, which is based on the MPC8245 design.

Parametrics

XPC8241LZP200B absolute maximum ratings: (1)Supply voltage-CPU core and peripheral logic VDD: 0.3 to 2.1V; (2)Supply voltage-memory bus drivers, PCI and standard I/O buffers GVDD_OVDD: -0.3 to 3.6 V; (3)Supply voltage-PLLs AVDD/AVDD2: -0.3 to 2.1 V; (4)Supply voltage-PCI reference LVDD: 0.3 to 5.4 V; (5)Input voltage Vin: 0.3 to 3.6 V; (6)Operational die-junction temperature range Tj: 0 to 105 ℃; (7)Storage temperature range Tstg: -55 to 150 ℃.

Features

XPC8241LZP200B features: (1)Write buffering for PCI and processor accesses; (2)Normal parity, read-modify-write (RMW), or ECC; (3)Data-path buffering between memory interface and processor; (4)Low-voltage TTL logic (LVTTL) interfaces; (5)272 Mbytes of base and extended ROM/Flash/PortX space; (6)Base ROM space for 8-bit data path or same size as the SDRAM data path (32- or 64-bit); (7)Extended ROM space for 8-, 16-, 32-bit gathering data path, 32- or 64-bit (wide) data path; (8)PortX: 8-, 16-, 32-, or 64-bit general-purpose I/O port using ROM controller interface with programmable address strobe timing, data ready input signal (DRDY), and 4 chip selects.